Memory-optimized DeHs are designed for processing large-scale data sets in the memory. They use the latest Intel Xeon Skylake CPUs, network acceleration engines, and Data Plane Development Kit (DPDK) to provide higher network performance, providing a maximum of 512 GB DDR4 memory for high-memory computing applications.
Memory-optimized DeHs are classified into m3 and m4 DeHs.
Flavor Type |
Number of Sockets |
Number of Cores per Socket |
Hardware Specifications |
Number of vCPUs |
|---|---|---|---|---|
m3 |
2 |
18 |
|
60 |
Flavor Type |
Number of Sockets |
Number of Cores per Socket |
Hardware Specifications |
Number of vCPUs |
|---|---|---|---|---|
m4 |
2 |
22 |
|
76 |
Flavor Name |
vCPUs |
Memory (RAM in GB) |
|---|---|---|
m3.large.8 |
2 |
16 |
m3.xlarge.8 |
4 |
32 |
m3.2xlarge.8 |
8 |
64 |
m3.4xlarge.8 |
16 |
128 |
m3.8xlarge.8 |
32 |
256 |
m3.15xlarge.8 |
60 |
512 |
Flavor Name |
vCPUs |
Memory (RAM in GB) |
|---|---|---|
m4.large.8 |
2 |
16 |
m4.xlarge.8 |
4 |
32 |
m4.2xlarge.8 |
8 |
64 |
m4.3xlarge.8 |
12 |
96 |
m4.4xlarge.8 |
16 |
128 |
m4.6xlarge.8 |
24 |
192 |
m4.8xlarge.8 |
32 |
256 |
m4.16xlarge.8 |
64 |
512 |